Channel 2 status register
| MEM_WADDR_EX_CH4 | This register records the memory address offset when receiver of CHANNEL%s is using the RAM. |
| APB_MEM_RADDR_CH4 | This register records the memory address offset when reads RAM over APB bus. |
| STATE_CH4 | This register records the FSM status of CHANNEL%s. |
| MEM_OWNER_ERR_CH4 | This status bit will be set when the ownership of memory block is wrong. |
| MEM_FULL_CH4 | This status bit will be set if the receiver receives more data than the memory size. |
| APB_MEM_RD_ERR_CH4 | This status bit will be set if the offset address out of memory size when reads via APB bus. |